This invention relates to charging capacitive loads. More particularly, this invention relates to charging capacitive loads in photoflash systems.
In conventional photoflash systems, fixed frequency switching power supply topologies are typically used to provide power to a capacitive load. For example, in fixed frequency applications, a portion of the period associated with the frequency can be used to turn a power switch (e.g., transistor) ON and another portion of the period can be used to turn the switch OFF. A ratio of ON-time TON versus OFF-time TOFF can be set to adjust the duty ratio applied to the power switch. During ON-time, the power switch is activated and then during OFF-time, the power switch is OFF. The TOFF/TON ratio can be adjusted to provide the appropriate power to the capacitive load during the switching cycle of the switching power supply. Typical DC-to-DC converters, for example, employ this technique. Therefore, under varying load conditions or output voltage requirements, conventional switching power supply topologies can adjust the TOFF/TON ratio to meet output voltage and load requirements.
This approach as it relates to photoflash systems, however, has several potential problems. One problem is that the photoflash capacitor voltage can vary continuously from, for example, 0V at the start of a charging cycle to 300V at the end of the charging cycle. This wide variation in voltages can put demands that are impractical to implement on conventional power switching supplies. For example, some conventional switching power supplies may not have the capability to adjust the TOFF/TON ratio to provide power to charge output capacitor loads that vary over a wide voltage range.
Another potential problem that may occur with conventional power switching supplies is that the output voltage feedback mechanism used to monitor the output voltage can be a source of constant power dissipation. For example, a feedback mechanism may include a resistor divider coupled between the output capacitor load and ground. During operation, this coupling exhibits an I2R power loss. Furthermore, several tens of microamps may be required to be conducted in the resistor divider to minimize the affect of finite input impedance of the feedback mechanism. In addition, when the conventional switching supply operates to maintain a relatively high output voltage (e.g., 300V), the feedback mechanism can dissipate several milliwatts. Since it is desirable to maintain the capacitor voltage at flash ready status, the feedback mechanism has to constantly monitor the capacitor voltage to ensure that the proper voltage is maintained, thus creating an undesirable long term power loss.
Another problem that can occur with conventional switching power supplies is that the switching action required to obtain the proper output voltage cannot be stopped. Instead, the conventional switching power supply continuously adjusts the TOFF/TON ratio to maintain a constant output voltage relative to a given load. In other words, the conventional switching power supply continues to supply power to the load even when the desired capacitor voltage has been reached. This can add additional power losses that reduce the efficiency of conventional photoflash systems.
Therefore, it is an object of this invention to provide a power switching topology that delivers power to a capacitive load over a wide range of capacitor load voltages.
It is also an object of this invention to provide a feedback mechanism that measures the capacitor voltage that is substantially independent of a continuous power drain.
It is also an object of this invention to limit power delivery when the photoflash capacitor reaches its desired voltage.
Therefore, circuits and techniques including power delivery circuitry, measuring circuitry, and control circuitry for a capacitor charging circuit are provided. The power delivery circuitry may implement a self-clocking switch mechanism to transfer power from a power source to an output capacitor load. Moreover, the power delivery circuitry can include ON-time circuitry and OFF-time circuitry. The ON-time circuitry preferably uses the current in the primary winding to generate signals that control the ON-time of a power switch (e.g, transistor). Once the primary current reaches a predetermined threshold, the signal generated by the ON-time circuitry turns the power switch OFF, thus causing the power switch to go into OFF-time. The OFF-time circuitry preferably uses the current in the secondary winding to generate signals that control the OFF-time of the power switch. When the secondary current reaches a predetermined value, the signal generated by the OFF-time circuitry turns the power switch ON. The signals generated by the ON-time and OFF-time circuitry are received and coordinated by a latch to form a cycle having switch ON-time and switch OFF-time.
The power delivery circuitry operates as follows. During ON-time, the switch is activated and the transformer is energized until the switch is deactivated. When the transformer energizes, the current in the primary side of the transformer increases until the voltage across a resistor, which may conduct all or a portion of the primary current, in the ON-time circuitry is greater than an ON-time reference voltage. Once the voltage is greater than the reference voltage, the ON-time circuitry can generate a signal that causes the latch to turn OFF the switch, thus activating the OFF-time portion of the switching cycle.
During OFF-time, the transformer de-energizes as the current in the secondary side of the transformer is used to charge the load. During charging, the secondary current may decrease until the voltage across a resistor, which conducts all or a portion of the secondary current, in the OFF-time circuitry is less negative than an OFF-time reference voltage. Once the voltage is less negative than the reference voltage, the OFF-time circuitry can generate a signal that causes the latch to reactivate the switch (i.e., return to ON-time). The ON-time/OFF-time cycle can repeat indefinitely until the output voltage has reached a desired voltage.
This architecture may be considered current based because it determines the ON-time and the OFF-time as a result of the current through the primary and secondary windings of the transformer. This current-based switching arrangement can provide a versatile and adaptable switching topology that yields fast and efficient transfer of power to capacitive loads. In particular, both the switch-ON time and switch-OFF time can be adaptable to conditions present in the circuit. For example, the ON-time/OFF-time cycle can exhibit a high degree of flexibility in providing power to charge capacitive loads ranging from zero volts to several hundred volts. The adaptable switch topology can also adapt automatically for variations in the power supply input voltage. For example, if the input voltage is lower than average, the ON-time circuitry may not deactivate the power switch as soon as if the input voltage was relatively average. In this way, the power delivery circuitry can energize the transformer to substantially the same level even though the input voltage is lower.
The measuring circuitry of the present invention provides the capacitor charging circuit with the ability to indirectly measure the output capacitor load voltage by monitoring the voltage waveform on the primary transformer winding during the OFF-time cycle. Measuring the voltage on the primary transformer winding during the OFF-time cycle can provide the capacitor charging circuit with the ability to reduce wasteful power consumption.
During measurement, the voltage waveform from the primary transformer winding is preferably converted to a ground-referred voltage. The ground-referred voltage may be an instantaneous representation of the output capacitor load voltage. This ground-referred voltage can be compared to a reference voltage to determine if the output voltage has reached a desired value. If the output voltage reaches the desired voltage, the measuring circuitry can provide an output signal to the control circuitry. The output signal preferably indicates that the desired capacitor load voltage has been reached.
If the control circuitry receives a signal from the measuring circuitry indicating that the capacitor load voltage has reached the desired voltage, the control circuitry can temporarily disable the power delivery circuitry. Disablement of the power delivery circuitry saves power because additional switching cycles no longer occur (until switching cycles are required again to charge the capacitive load). Moreover, an interrogation timer can be programmed to maintain the power delivery circuitry in a disabled state for a variable period of time. Once the programmable period of time runs out, the interrogation timer can generate a signal that automatically causes the control circuitry to re-enable the power delivery circuitry. When, for example, the timer times out, the control circuitry can enable the power delivery circuitry until the output voltage returns to the desired voltage. Once the desired voltage is obtained, the control circuitry can disable the power delivery circuitry again for a specified time, a variable period of time or flash event.
The control circuitry can cycle between the activated/de-activated modes to maintain a constant desired voltage in a preferred range on the output capacitor load. Assuming that no flash events occur, this cycle can run continuously to automatically compensate for voltage drops in the output capacitor load voltage. For example, capacitor load voltages can drop as a result of capacitor self-discharge.